1. Technical Field
The present invention relates to methods for manufacturing a modularized integrated circuit, and more particularly, to a method for manufacturing a modularized integrated circuit for use with System on Chip (SoC) integrated circuits.
2. Description of Related Art
Due to rapid technological development, integrated circuits nowadays have increasingly powerful functions, contain an increasing number of components, and feature a core circuit with an increasingly complicated structure; hence, the required number of input/output pins of an integrated circuit is ever-increasing. With its dimensions being ever-decreasing, the core circuit of an integrated circuit has to be manufactured by an advanced process in order to be capable of accommodating increasingly abundant components and increasingly intricate circuits.
In the aforesaid situation, a conventional method for manufacturing an integrated circuit by a single manufacturing process is confronted with a problem as follows: to provide sufficiently high current propulsion, high electrostatic discharge protection, high noise immunity, and high latch-up protection, an input/output circuit is not downsized proportionally to the core circuit manufactured by an advanced process but is even oversize when compared to circuits manufactured by a common process. If the input/output circuit is manufactured by the same advanced process as the core circuit is, its costs will increase greatly. Hence, the aforesaid consideration has to be given to core circuit design and thus undesirably imposes limitations thereon.
In response to the ever-increasing components of a core circuit, the technology related to the advanced process for manufacturing core circuits keeps evolving. Every instance of the introduction of a novel process is accompanied by a new search for design methodology that strikes a balance between meeting the requirements of high current propulsion, high electrostatic discharge protection, high noise immunity, and high latch-up protection and avoiding an increase in the overall dimensions of an integrated circuit. The new search incurs much R&D (research and development) costs and time.